Problems of Designing LDMOS-transistors Working at Increased Supply Voltage

Glushko A.A. (NIISI RAS, Bauman Moscow State Technical University), Babkin S.I., Amirkhanov A.V. (NIISI RAS), Zinchenko L.A., Makarchuk V.V. (Bauman Moscow State Technical University)
Abstract - the problems of designing LDMOS-transistors, oriented to work with a voltage of 12 V are considered. Particular attention is paid to determining the concentration of the DRIFT doping region to achieve the maximum breakdown voltage of the transistor. The main purpose of the work is to create a LDMOS structure with breakdown Voltage about 36-40 V and operating Voltage +12V. The method of the work implementation is the simulation with TCAD systems of LDMOS structure in two steps. In first step approximate simulation is carried out and the better structure satisfying the conditions of the problem. In second step, the more accurate simulation is carried out and the parameters of ion implantation steps are determined. The Breakdown Voltage dependence from impurity concentration in DRIFT area is determined. In conclusion, the experimental results are disscussed. The breakdown Voltage about 40V is achieved but DRIFT area is not used the most effectively. So as to improve the efficiency of the DRIFT area it is needed to use the initial wafers with box area no smaller than 0.5 um.

Keywords - MOSFET, simulation, technology, VLSI

Вопросы проектирования LDMOS-транзисторов, работающих при повышенном напряжении питания

Глушко А.А. (ФГУ "ФНЦ НИИСИ РАН", МГТУ им. Н.Э.Баумана, г. Москва), Бабкин С.И., Амирханов А.В. (ФГУ "ФНЦ НИИСИ РАН", г. Москва), Зинченко Л.А., Макарчук В.В. (МГТУ им. Н.Э.Баумана, г. Москва)
Аннотация - рассмотрены вопросы проектирования LDMOS-транзисторов, ориентированных на работу при напряжении питания +12В. Особое внимание уделено определению концентрации примеси в области легирования DRIFT для достижения максимального напряжения пробоя транзистора.

Ключевые слова - МОП-транзистор, моделирование, технология, СБИС