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Listing of works with the partition by the subject of reports. Click on the work title to see its details. The selected set may be restricted by specifying a range of conference years, or by selecting a specific topic.

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ADC design problems
Cellular automata
Design of System-on-chip (SoC) and IP-blocks
Design of VLSI elements
Design of VLSI signal processors
Design of analog and mixed functional blocks of VLSI
Design of digital functional blocks of VLSI
Design of fault-tolerance systems
Design of micro-electromechanical systems
Design of nanoelectronic devices
Design of nanoelectronic devices based on Josephson junctions
Design of photodetecting VLSI
Design of radiation-resistant VLSI
Design of technological processes
Designing components for aerospace and navigation technology
Genetic algorithms in VLSI CAD
Methods and algorithms for automated layout design
Methods for high-level simulation
Methods of device technology simulation of VLSI
Methods of digital information processing and digital filters
Methods of electro-thermal simulation
Methods of logic synthesis and functional logic simulation ...
Methods of simulation of VLSI electrical characteristics
Models of devices for circuit simulation
Problems of development of sensory microcircuitry
Simulation of data transfer channels
Study of the magnetic properties of materials
Unconventional computing systems
design of memory cells
Selection on topic: Design of VLSI signal processors
Selected papers: from 2005 to 2018 year
In selection - 20 papers
Analog and digital micro- and nanoelectronics circuits for communications
Architectural features of VELCore-01 video processing core
Bit error rate calculation in high performance communication channels
Block of Fast Fourier Transformation for wireless communication systems on the basis of
Block of decoder Viterbi for wireless communication systems on the basis of standard IEEE 802.16
Characteristics of the "Multicore" series controllers for FFT processing signal in real time and their application in radar
Design features of the multipliers on the module using advanced CAD
Detector of Free Parts of Radio Frequency Spectrum
Digital Signal Processor With Non-Conventional Recurrent Data-Flow Architecture
Digital Television Decoder VLSI. The Technology of Design
Family of domestic DSP-controllers "MultiCore" and elements of system interface "MultiCore-the designer" for construction of scaled parallel systems of teraflop productivity
Methodology of the automated designing of radio receiver devices of digital communication systems
Motion Estimation IP-core Implementation for H.264 Full HD Video Codec
Multiprotocol switchboards for the heterogeneous distributed onboard complexes
NAND Flash memory controller IP-core
New digital signal processor 1879┬╠4 of the NeuroMatrix« processor family
Recurrent data-flow architecture: features and realization problems
Specialized the architecture of the parallel multicore dataflow computing system for solution of task FFT
The project of the on-chip processor for videostream processing are developed. This project are based on Russian SIMD processor PARS
1879Ň╩1 System-on-a-Chip for digital processing of analog signals in radio systems and satellite navigation systems

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