Home         Authors   Papers   Year of conference   Themes   Organizations        To MES conference

Gerasimov Yu.M.

Electronic VLSI Engineering & Embedded Systems (ELVEES) R&D Center of Microelectronics

Listing of all the works of the author. Click on the work title to get the full information.

2005 
 Bajkov V.D., Gerasimov Yu.M., Rogatkin Yu.B.
Peripheral analog-digital blocks for CMOS VLSI of type "system-on-chip"
 Shejnin Yu.E., Suvorova E.A., Rozhdestvenskij D.A., Solokhina T.V., Glushkov A.V., Alekseev I.N., Gerasimov Yu.M.
Route of development and FPGA-verifications of IP-core of controller SpaseWire link for "system-on-chip" on the basis of platform "MultiCore"
 Belyaev A.A., Solokhina T.V., Glushkov A.V., Aleksandrov Yu.N., Petrichkovich Ya.Ya., Mironova Yu.V., Gerasimov Yu.M.
MCam-01 mixed signal multimedia processor
 Glushkov A.V., Gribov Yu.I., Silin V.A., Solokhina T.V., Gerasimov Yu.M., Nefedov V.A., Shejnin Yu.E.
Analog-digital "system on crystal" peripheral controller MCT-01 on the basis of IP-libraries of a platform "MULTICORE"
 Goussev V.V., Enin S.V., Lihih S.N., Lavlinsky S.A., Menyajlov D.E., Petrichkovich Ya.Ya., Skok D.V., Solokhina T.V., Smirnova I.I., Sudnev E.N., Gerasimov Yu.M.
Analog-digital "system-on-chip" MF01 of series "Multiflex"
2008 
 Gerasimov Yu.M., Glushkov A.V., Grigoryev N.G., Petrichkovich Ya.Ya., Solokhina T.V.
Features of designing of radiation-proof libraries of elements, complex-functional blocks and nano-VLSI SoC
2010 
 Bajkov V.D., Gerasimov Yu.M., Kondratenko S.V., Solokhina T.V.
Special features and results of designing the family of LVDS CMOS 0,25/0,18/0,13 m drivers and receivers
2014 
 Gerasimov Yu.M., Grigoryev N.G., Goussev V.V., Kobylyatskiy A.V., Petrichkovich Ya.Ya.
Radiation-hardned CMOS VLSI SRAM in bulk technology
 Gerasimov Yu.M., Domozhakov D.A., Kondratenko S.V., Lomakin S., Solokhina T.V.
Methods of implementation of high-speed serial channels CMOS transceivers on a physical level
2016 
 Gerasimov Yu.M., Grigoryev N.G., Kobylyatskiy A.V.
The technique of logical circuit parameters selection in nanometer RHBD CMOS VLSI
 

Copyright 2009-2018 IPPM RAS. All Rights Reserved.

Design of site: IPPM RAS