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Kirichenko P.G.

NIISI RAS

Listing of all the works of the author. Click on the work title to get the full information.

2010 
 Evlampiev B.E., Vlasov A.O., Kirichenko P.G., Kochnov A.A.
Optimization for some phase of Komdiv64-RIO design flow
2012 
 Vlasov A.O., Evlampiev B.E., Kirichenko P.G., Kochnov A.A., Pominova A.A.
Phisical Design Flow optimization for Komdiv64-RIO processor
 Buyakova O.N., Kirichenko P.G., Osina S.E., Sysoeva O.V., Tarasov I.V.
Register file base elements and design flow development for SOI 0.25-micron technology
2014 
 Sysoeva O.V., Agafonov A.E., Kirichenko P.G.
Spread spectrum clock generator design methods
2016 
 Kirichenko P.G., Solovyeva L.A., Tarasov I.V.
Design of Power Efficient 14-port Register File and Translation Lookaside Buffer in 28-nm Process
 

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