Home         Authors   Papers   Year of conference   Themes   Organizations        To MES conference

Solokhina T.V.

Electronic VLSI Engineering & Embedded Systems (ELVEES) R&D Center of Microelectronics

Listing of all the works of the author. Click on the work title to get the full information.

2005 
 Kozlova N.N., Solokhina T.V., Gribov Yu.I., Belyaev A.A.
Configurable IP-cores architecture analysys using criterion of implementation ability in MULTICORE platform IP-library
 Glushkov A.V., Solokhina T.V., Petrichkovich Ya.Ya.
Alarm controllers MS-0226 and -0226G on the basis of platform "MULTICORE"
 Shejnin Yu.E., Suvorova E.A., Rozhdestvenskij D.A., Solokhina T.V., Glushkov A.V., Alekseev I.N., Gerasimov Yu.M.
Route of development and FPGA-verifications of IP-core of controller SpaseWire link for "system-on-chip" on the basis of platform "MultiCore"
 Glushkov A.V., Gribov Yu.I., Silin V.A., Solokhina T.V., Gerasimov Yu.M., Nefedov V.A., Shejnin Yu.E.
Analog-digital "system on crystal" peripheral controller MCT-01 on the basis of IP-libraries of a platform "MULTICORE"
 Solokhina T.V., Petrichkovich Ya.Ya., Glushkov A.V.
Architecture of domestic IC series of type "system or network on chip" on the basis of IP-libraries of platform "MULTICORE"
 Goussev V.V., Enin S.V., Lihih S.N., Lavlinsky S.A., Menyajlov D.E., Petrichkovich Ya.Ya., Skok D.V., Solokhina T.V., Smirnova I.I., Sudnev E.N., Gerasimov Yu.M.
Analog-digital "system-on-chip" MF01 of series "Multiflex"
 Belyaev A.A., Solokhina T.V., Glushkov A.V., Aleksandrov Yu.N., Petrichkovich Ya.Ya., Mironova Yu.V., Gerasimov Yu.M.
MCam-01 mixed signal multimedia processor
2006 
 Aleksandrov Yu.N., Kuchinsky A.S., Zinchenko O.N., Kolobanova E.S., Solokhina T.V.
Characteristics of the "Multicore" series controllers for FFT processing signal in real time and their application in radar
 Glushkov A.V., Solokhina T.V., Petrichkovich Ya.Ya., Gorbachev S.V., Suvorova E.A., Shejnin Yu.E.
Multiprotocol switchboards for the heterogeneous distributed onboard complexes
 Solokhina T.V., Glushkov A.V., Petrichkovich Ya.Ya., Grishin V.Yu., Eremeev P.M., Sirenko V.G., Shejnin Yu.E.
Family of domestic DSP-controllers "MultiCore" and elements of system interface "MultiCore-the designer" for construction of scaled parallel systems of teraflop productivity
 Aleksandrov Yu.N., Grachev R.V., Solokhina T.V.
The block of digital operative processing matrix thermovisual photoreceiver on the basis of the signal microcontroller
2008 
 Belyaev A.A., Gribov Yu.I., Solokhina T.V.
Pipelining and parallelization: two approaches to rise computational performance
 Solokhina T.V.
Architecture of DSP-accelerators on the basis of a platform "MultiCore" for supercomputers of new generation
 Gerasimov Yu.M., Glushkov A.V., Grigoryev N.G., Petrichkovich Ya.Ya., Solokhina T.V.
Features of designing of radiation-proof libraries of elements, complex-functional blocks and nano-VLSI SoC
2010 
 Bajkov V.D., Gerasimov Yu.M., Kondratenko S.V., Solokhina T.V.
Special features and results of designing the family of LVDS CMOS 0,25/0,18/0,13 m drivers and receivers
2014 
 Belyaev A.A., Gavrilov V.S., Kuznetsov D.A., Petrichkovich Ya.Ya., Solokhina T.V., Frolov D.S., Funkner A.A.
Evolution in the area of multicore heterogeneous video data processing systems
 Gerasimov Yu.M., Domozhakov D.A., Kondratenko S.V., Lomakin S., Solokhina T.V.
Methods of implementation of high-speed serial channels CMOS transceivers on a physical level
 

Copyright 2009-2019 IPPM RAS. All Rights Reserved.

Design of site: IPPM RAS