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Listing of all the works of the organization. Click on the work title to get the full information.

 Gourary M.M., Rusakov S.G., Ulyanov S.L., Zharov M.M., Mulvaney B.J.
Adaptive method of harmonic balance
 Skrylev P.A., Smoleva O.S.
Architecture of the unified computing block for contactless photon system of measurement of parameters of a rail track
 Egorov Yu.B., Lyalinsky A.A.
Automation of synthesis of VHDL-AMS models for the mixed and analog behavioural simulation
 Solovyev R.A., Gavrilov S.V.
Delay noise analysis, using graph of constraint pairs
 Rakitin V.V., Uvarov A.K.
Development of integral digital filters for sigma-delta converters using MATLAB
 Kornilov A.I., Semenov M.Yu., Lastochkin O.V., Kalashnikov V.S.
Methodology of designing of specialized calculators on the basis of the automated generation of technologically independent IP-blocks
 Bezrukov A.E., Rusakov A.S., Tkachev D.F., Khapaev M.M.
Methods of the parasitic extraction of interconnect in the integral circuits
 Gavrilov S.V., Glebov A.L.
Noise analysis of digital circuits with accounting of logic constraints
 Pugachev A.A.
Numerical Simulation of Photosensitive VLSI Pixels
 Kornilov A.I., Semenov M.Yu., Lastochkin O.V., Kalashnikov V.S.
Principles of construction of specialized calculators based on residual arithmetics
 Sambursky L.M.
SPICE models of optoelectronic elements for simulation of photosensitive PD-CMOS VLSI
 Gavrilov S.V., Glebov A.L., Lyalinskaya O.V., Solovyev R.A.
Application of standard cell characterization results in statistical timing analysis
 Stempkovsky A.L., Kornilov A.I., Semenov M.Yu., Lastochkin O.V., Kalashnikov V.S.
Construction of systems of raised reliability based on residual arithmetics with application of modern methods and tools of designing
 Kharlamov S.A.
Information problems of supervision and control in a micromechanical gyroscope system
 Egorov Yu.B., Rusakov S.G., Lyalinsky A.A.
Modelling of radio engineering circuits with digital modulation within the frames of VHDL-AMS simulation systems
 Bojko A.Ya., Bezrukov A.E., Rusakov A.S., Tkachev D.F., Khapaev M.M.
New Algorithm for the 2D Capacitance calculation in the interconnect parasitic extraction problem
 Pugachev A.A., Osochkin S.S.
Physical-topological model of modulation transfer fuction
 Solovyev R.A., Glebov A.L., Gavrilov S.V.
Static timing analysis aware false conduct path detection in terms of logic implication
 Adamov Yu.F., Gorshkova N.M., Krupkina T.Yu.
The Utilization of Photolayers for Bipolar Transistors Implementation in Typical CMOS Process
 Gourary M.M., Ulyanov S.L., Mulvaney B.J.
The simulation method of nonlinear distortion of radio frequency circuits with digital modulation in circuit simulators
 Zharov M.M., Rusakov S.G.
Two-level reduction of models of parasitic circuits of the high order
 Uvarov A.K., Rakitin V.V.
16-digit 6.4 MHz CMOS sigma-delta ADC for sound processing
 Rusakov A.S., Khapaev M.M.
Accuracy Improvement of the Interconnect Parasitic Capacitance Extraction
 Gorshkova N.M.
Constructive and technological design of silicon color photocells with deep color separation based on isotype š+-š junctions
 Muhanyuk N.N.
Development of technologically independent method of designing analog IC on the basis of library of parametrical cells
 Bragin K.R., Gavrilov S.V., Kagramanyan E.R.
Logic-timing analysis methodology for characterization of custom blocks of digital CMOS IC
 Gudkova O.N., Gavrilov S.V.
Logical timing analysis of digital IC reliability with NBTI and HCI degradation effects
 Gourary M.M., Zharov M.M., Rusakov S.G., Ulyanov S.L.
Method of small-signal analysis for the simulation of multitone radio frequency circuits
 Gourary M.M., Zharov M.M., Rusakov S.G., Ulyanov S.L.
Perturbation methods and selective methods in problems of a reduction of high-dimension models
 Pugachev A.A., Maklakova O.V., Kushnir A.A.
Photosensitive CCD VLSI TCAD modeling
 Kharitonov I.A., Petrosyants K.O., Orekhov E.V., Yatmanov A.P., Sambursky L.M.
Process and device simulation of CMOS SOI VLSI elements with an account for radiation effects
 Kagramanyan E.R., Gavrilov S.V., Egorov Yu.B.
Standard cell characterezition methodoligy with respect MOSFET threshold voltage variation
 Solovyev R.A., Gavrilov S.V., Glebov A.L.
Statistical timing analysis aware of reconvergence of conduction paths and transition variations
 Amerbaev V.M., Telpukhov D.V., Konstantinov A.V.
The Bivalent Defect of Modular Codes. The Choise of Technological Modules, that Reduce Bivalent Defect
 Andreev P.P., Pugachev A.A., Khodosh L.S.
The project of the on-chip processor for videostream processing are developed. This project are based on Russian SIMD processor PARS
 Polevikov V.V.
“Cycle-To-Cycle” methodology for timing analysis of high speed synchronous interfaces
 Rakitin V.V.
A Pipelined Analog-to Digital Converters With Digital Calibration
 Agrich Yu.V., Lifshits V.B.
A Precision Voltage-to-Frequency Converter Design
 Gourary M.M., Zharov M.M., Rusakov S.G., Lyalinsky A.A.
Application of Selective Techniques for Parametric Model Order Reduction
 Pugachev A.A., Stempkovsky A.L.
CMOS-APS element with high charge-collection efficiency
 Makarov A.B.
CMOS analog blocks technology migration
 Gourary M.M., Zharov M.M., Ulyanov S.L.
Computational method for determining phase noise in oscillators
 Adamov Yu.F.
Designing and production problems of smart sensors controllers
 Telpukhov D.V., Amerbaev V.M., Balaka E.S., Konstantinov A.V.
Design method of DSP-oriented modular logarithmic forward converter
 Sibagatullin A.G.
Influence Reduction of Technological Variations and Interferences on Signal Distortion in High-Speed Integrated ADC for System-on-Chip
 Balaka E.S., Amerbaev V.M., Konstantinov A.V., Telpukhov D.V.
Methods of Scalar Products Speed Enhancement in Residue Logarithmic Number System Basis
 Rusakov A.S., Romano V.
Numerical model of semiconductors with crystal heating
 Agrich Yu.V., Lifshits V.B.
Optimized for Sub-micron Processes A High Speed ADC Architecture
 Somov O.A., Adamov Yu.F., Gorshkova N.M., Sibagatullin A.G.
Reconfigurable Smart Sensor Controllers
 Amerbaev V.M., Kornilov A.I., Stempkovsky A.L.
Residue Logarithmic Number System – A New Possibilities for Residue Processors and Converters Designing
 Levchenko N.N., Okunev A.S.
Specialized the architecture of the parallel multicore dataflow computing system for solution of task FFT
 Makarov A.B., Kochkin I.P.
Technology migration of CMOS band gap voltage reference
 Gourary M.M., Rusakov S.G., Ulyanov S.L.
The Development of the Method for Analyzing Mutual Synchronization Mode of Oscillators in Integrated Circuits
 Gudkova O.N., Gavrilov S.V., Egorov Yu.B.
The Method of Section Approximation for Grid Optimization for Standard Cell Library Characterization
 Gudkova O.N., Skachkova E.P., Muhanyuk N.N., Gavrilov S.V., Solovyev R.A.
The Methods of Fast Characterization of Large Scale Integration Parameterized IP-blocks
 Sibagatullin A.G., Adamov Yu.F., Gorshkova N.M., Somov O.A.
The controller of the laser smoke fire detector with frequency filtering
 Lifshits V.B., Agrich Yu.V.
The static accuracy model for the pipelined ADC with calibration
 Agrich Yu.V., Lifshits V.B.
A High Speed ADC with Low Power Consumption
 Gavrilov S.V., Gudkova O.N., Severtsev V.N.
CMOS circuit interval static timing analysis accounting for logic correlations
 Makarov A.B.
CMOS frequency divider by 2 with high stability of output signal duty cycle
 Andreev A.A., Pavisic I., Rusakov A.S.
Global placement algorithm for structured ASIC
 Soloviev A.N.
Gyro-free inertial navigation system
 Amerbaev V.M., Telpukhov D.V., Balaka E.S., Konstantinov A.V.
Implementation of Residue Number Systems Converter Combined with the Rounding Operation for DSP Applications
 Petrosyants K.O., Kharitonov I.A., Orekhov E.V., Sambursky L.M., Yatmanov A.P., Voevodin A.V.
Investigation of single event upset reliability for SOI CMOS SRAM cells using mixed-mode 3D TCAD-SPICE simulation
 Rakitin V.V.
Nanometer merged MOS devices modeling
 Amerbaev V.M., Stempkovsky A.L., Solovyev R.A.
Parallel computing in the ring of Gaussian integers over the Galois field GF(p)
 Lifshits V.B., Agrich Yu.V.
Segment calibration in pipeline ADC
 Levchenko N.N., Okunev A.S., Yakhontov D.E.
Study of mapping processor for dataflow parallel computing system "Buran"
 Kostukov E.V., Pospelova M.A., Pugachev A.A.
TCAD-model of CCD image sensor with vertical antiblooming
 Gavrilov S.V., Gudkova O.N., Pirutina G.A.
The Gate Delay Analysis Method Accounting for Simultaneous Input Switching
 Amerbaev V.M., Balaka E.S., Konstantinov A.V., Telpukhov D.V.
The RLNS Implementation for matrix algebra special problems solution
 Gourary M.M., Zharov M.M., Ulyanov S.L., Khodosh L.S.
The computational method for nonlinear distortion analysis with multitone test signals
 Gourary M.M., Zharov M.M., Rusakov S.G., Ulyanov S.L.
The modeling of NBTI effect in analog integrated circuits
 Adamov Yu.F., Balaka E.S., Gorshkova N.M., Sibagatullin A.G.
The power effective communication line for systems on a crystal with dynamic management of frequency synchronization
 Gourary M.M., Zharov M.M., Rusakov S.G.
The reduction algorithms of linear networks with inductances on the base of selective methods of elimination
 Levchenko N.N., Okunev A.S., Stempkovsky A.L.
The usage of dataflow computing model and architecture realizing these for exaflops performance system
 Levchenko N.N., Okunev A.S., Yakhontov D.E., Shurchkov I.O.
Variants of realization of controller for parallel dataflow computing system to work with vector and multioperand nodes
 Lyalinsky A.A.
Web-based Generation of Highlevel Models of Digital Cells
 Lyalinsky A.A.
Web-based automatic generation of input patterns at characterization of digital cells
 Amerbaev V.M., Balaka E.S., Solovyev R.A., Telpukhov D.V.
Analysis and synthesis of arithmetic unit of a field of Galois of prof. Pospelov D.A.
 Rusakov A.S., Sheblaev M.V.
Decomposition Algorithm of the Electronic Circuits with Elements with Varied Area
 Soloviev A.N., Sablin A.V., Lyalinsky A.A.
Development of the simulation environment of inertial navigation systems
 Solovyev R.A., Balaka E.S., Telpukhov D.V.
Device for calculation of vector dot product with error correction based on residue number system
 Chaplygin Yu.A., Timoshenkov V.P., Shevyakov V.I., Adamov Yu.F.
Electrostatic protection of BiCMOS IC's
 Telpukhov D.V., Amerbaev V.M., Balaka E.S., Solovyev R.A.
Hardware implementation of FIR filter based on number-theoretic fast Fourier transform in residue number system
 Ivannikov A.D., Stempkovsky A.L.
Mathematical model for complex digital circuits and microsystems projects debugging based on presenting the latest as a family of stationary dynamical systems
 Gavrilov S.V., Ivanova G.A., Manukyan A.A.
Methods of designing custom IP-blocks based on the elements with regular topological structure in layers of polysilicon and diffusion
 Klimov A.V., Zmejev D.N., Levchenko N.N., Okunev A.S.
Methods of regulation of computation in parallel dataflow computating system
 Zharov M.M., Rusakov S.G.
Model Order Reduction Techniques with Preservation of Sparseness in Circuit Simulation
 Rakitin V.V.
Modeling memristor circuits
 Gourary M.M., Rusakov S.G., Ulyanov S.L.
Nonlinear Phase Macromodel for the Analysis of oscillator circuits
 Zmejev D.N., Levchenko N.N., Okunev A.S., Stempkovsky A.L.
Research the principles of operation of the input block for the parallel dataflow computing system
 Zharov M.M.
The Numerical Algorithm for Stability Analysis of Large Dynamical Systems
 Zmejev D.N., Levchenko N.N., Okunev A.S., Klimov A.V.
The architecture of scheduler of mapping processor of PDCS "Buran"
 Pugachev A.A., Ivanova G.A.
The method for photosensitive matrix VLSI modulation transfer function simulation
 Gourary M.M., Rusakov S.G., Ulyanov S.L.
The method of harmonic balance for electrothermal analysis of periodic steady states of IC
 Ryzhova D.I., Gavrilov S.V.
The method of peak current estimation at logic level taking into account simultaneous switching of inputs
 Volobuev P.S., Gavrilov S.V., Ryzhova D.I.
The method of static power reducing for CMOS circuits based on sleep transistors with operation speed control
 Stempkovsky A.L., Amerbaev V.M.
The principle of factorization in a problem of design of RBS-based processors
 Chaplygin Yu.A., Adamov Yu.F., Timoshenkov V.P.
Using of VBIC model for SiGe integrated circuit application
 Poperechny P.S.
Adjustable error-correcting encoder for Systems on Chip
 Shlepnev A.A.
Adoption of Genetic Algorithms for running in elastic compute environment concerning CAD applications
 Klimov A.V., Okunev A.S.
A graphical dataflow meta-language for asynchronous distributed programming
 Zelenko G.V., Ivannikov A.D., Roschin A.V., Stempkovsky A.L.
Algebraic Decomposition Models for Digital System Design Debugging by Simulation
 Matyushkin I.V.
Algorithms of the parallel computations in the formalization of cellular automata: the sorting of strings and the multiplication of numbers by Atrubin’s method
 Calem M.M., Nematov M.G., Uddin A., Panina L.V., Morchenko A.T., Skidanov V.A.
Amorphous glass-coated microwires for applications as embedded stress sensors in functional materials
 Matyushkin I.V., Zapletina M.A.
Cellular automata methods of the numerical solution of mathematical physics equations for the hexagonal grid
 Telpukhov D.V., Solovyev R.A., Balaka E.S., Rukhlov V.S., Mikhmel A.S.
Design features of the multipliers on the module using advanced CAD
 Zmejev D.N.
Design tools of high-performance dataflow computing systems
 Ostrovskaya N.V., Skidanov V.A., Iusipova Iu.A.
Features of magnetization reversal in a MRAM cell — I. In-plane anisotropy
 Ostrovskaya N.V., Skidanov V.A., Skvortsov M.S.
Features of magnetization reversal in a MRAM cell — II. Perpendicular anisotropy
 Lyalinsky A.A.
Generation of large sets of logical functions for digital integrated circuits CAD systems
 Garbulina T., Lyalinskaya O.V., Khvatov V.M.
Improving the efficiency of the design integrated circuits on FPGA with limited resources to trace
 Rakitin V.V., Rusakov S.G.
Memristor oscillator Schmitt trigger with multiple steady states of dynamic equilibrium
 Gavrilov S.V., Zhukova T.D., Ryzhova D.I.
Optimization methods of coding circuits based on the binary decision diagrams for synthesis of fault-tolerant micro- and nanoelectronic circuits
 Gourary M.M., Zharov M.M., Rusakov S.G., Ulyanov S.L., Lyalinsky A.A.
Parameter optimization subsystem of CMOS operational amplifiers
 Poperechny P.S.
Polynomial modular multipliers for error correcting code devices
 Stempkovsky A.L., Telpukhov D.V., Solovyev R.A., Telpukhova N.V.
Probabilistic methods for reliability evaluation of combinational circuits
 Gourary M.M., Zharov M.M., Ulyanov S.L., Khodosh L.S.
Rational Transfer Functions Approximation on the Base of Integral Accuracy Criterion
 Gourary M.M., Zharov M.M., Ionov L.P., Mukhin I.I., Rusakov S.G., Ulyanov S.L.
Simulation of PLL Perturbation Based on Blocks Transfer Functions
 Gurov S.I., Ryzhova D.I.
The algorithm for synthesis of digital ICs based on the Gilbert decomposition
 Klimov A.V., Levchenko N.N., Okunev A.S., Stempkovsky A.L.
The application and implementation issues of dataflow computing system
 Adamov Yu.F., Balaka E.S., Rukhlov V.S.
The circuitry of electronic devices that operate in conditions of electromagnetic noise
 Zmejev D.N., Klimov A.V., Levchenko N.N.
The means for computation distribution in the PDCS "Buran" and the implementation variants of a block of hash-functions
 Kononov A., Pugachev A.A.
The method for CMOS APS light-voltage characteristics technological-device modeling
 Zheleznikov D.A., Lyalinsky A.A.
The method of timing optimization for FPGA at the microarchitecture level using the pipelining mechanism
 Gavrilov S.V., Zhukova T.D., Ryzhova D.I.
The methods of time-logic analysis of library elements and VLSI blocks for advanced technologies with a vertical transistor’s gate
 Zmejev D.N., Kuzmin E.N., Levchenko N.N., Okunev A.S.
Trends in development of content addressable memory architectures and its application in the parallel dataflow computing system

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