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Listing of all the works of the organization. Click on the work title to get the full information.

 Goussev V.V., Enin S.V., Lihih S.N., Lavlinsky S.A., Menyajlov D.E., Petrichkovich Ya.Ya., Skok D.V., Solokhina T.V., Smirnova I.I., Sudnev E.N., Gerasimov Yu.M.
Analog-digital "system-on-chip" MF01 of series "Multiflex"
 Glushkov A.V., Gribov Yu.I., Silin V.A., Solokhina T.V., Gerasimov Yu.M., Nefedov V.A., Shejnin Yu.E.
Analog-digital "system on crystal" peripheral controller MCT-01 on the basis of IP-libraries of a platform "MULTICORE"
 Bajkov V.D., Garmash A.A., Samonov A.A., Sevryukov A.N.
Designing PLL-blocks for systems of synchronization of integrated devices of information processing
 Belyaev A.A., Solokhina T.V., Glushkov A.V., Aleksandrov Yu.N., Petrichkovich Ya.Ya., Mironova Yu.V., Gerasimov Yu.M.
MCam-01 mixed signal multimedia processor
 Bajkov V.D., Gerasimov Yu.M., Rogatkin Yu.B.
Peripheral analog-digital blocks for CMOS VLSI of type "system-on-chip"
 Shejnin Yu.E., Suvorova E.A., Rozhdestvenskij D.A., Solokhina T.V., Glushkov A.V., Alekseev I.N., Gerasimov Yu.M.
Route of development and FPGA-verifications of IP-core of controller SpaseWire link for "system-on-chip" on the basis of platform "MultiCore"
 Davydov G.G., Sogoyan A.V., Petrov A.G., Artamonov A.S., Yashanin I.B., Skobelev A.V., Sedakov A.Yu.
Application of a technique of not destroying control of dose stability of parties SoS CMOS VLSI
 Gerasimov Yu.M., Glushkov A.V., Grigoryev N.G., Petrichkovich Ya.Ya., Solokhina T.V.
Features of designing of radiation-proof libraries of elements, complex-functional blocks and nano-VLSI SoC
 Bajkov V.D., Gerasimov Yu.M., Kondratenko S.V., Solokhina T.V.
Special features and results of designing the family of LVDS CMOS 0,25/0,18/0,13 žm drivers and receivers
 Pechenkin A.A., Vasilyev A.L., Kozlov A.A., Koltsov D.O., Orlov A.A., Tararaksin A.S., Chumakov A.I., Yanenko A.V.
Test and Computer Simulation Procedure for Single Event Effect Prediction of ICs in a Space Environment
 Chumakov A.I., Vasilyev A.L., Pechenkin A.A., Savchenkov D.V., Tararaksin A.S., Yanenko A.V.
Estimation of ICs SEE Sensitivity Using Local Laser and Pulse Gamma-Ray Technique
 Ulanova A.V., Sogoyan A.V., Chumakov A.I., Nikiforov A.Y., Petrov A.G.
Features of the radiation hardness evaluation for integrated circuits in specialized protective packages
 Gromov D.V., Matveev Y.A., Nazarova G.N.
Impact of ionizing radiation on GaN HEMTs
 Tararaksin A.S., Nigmatullin R.R., Savchenkov D.V., Solovyov S.A., Yanenko A.V.
Single Event Latchup and Catastrophic Failure in CMOS Devices Investigation and Prevention Methods
 Boruzdina A.B., Ulanova A.V., Gorbunov M.S., Chumakov A.I.
Dependence of MCU Sensitivity in SRAM on Data Pattern and angle of incident
 Chumakov A.I., Savchenkov D.V., Pechenkin A.A., Mavritskiy O.B., Egorov A.N.
Experimental Verification of Some Laser Techniques' Approximations
 Mavritskiy O.B., Egorov A.N., Pechenkin A.A., Savchenkov D.V., Telets V.A.
Femtosecond Laser System for VLSI Heavy Ion Induced Single Event Effects Hardness Testing
 Gerasimov Yu.M., Domozhakov D.A., Kondratenko S.V., Lomakin S., Solokhina T.V.
Methods of implementation of high-speed serial channels CMOS transceivers on a physical level
 Smolin A.A., Ulanova A.V., Sogoyan A.V., Demidov A.A.
Modeling TID leakage current in MOS-structures under x-ray and gamma irradiation
 Borisov A.Y., Kessarinskiy L.N.
Proton and gamma-radiation ionizing effect comparative results
 Gerasimov Yu.M., Grigoryev N.G., Goussev V.V., Kobylyatskiy A.V., Petrichkovich Ya.Ya.
Radiation-hardned CMOS VLSI SRAM in bulk technology
 Novikov A.A., Pechenkin A.A., Ryasnoy N.V., Chumakov A.I.
SEE sensitivity changes at different TID levels
 Usachev N.A., Elesin V.V., Nazarova G.N., Chukov G.V., Telets V.A., Amburkin K.M., Sotskov D.I., Dmitriev V.A., Shelepin N.A.
System approach to design UHF RFID reader transceiver ICs
 Bajkov V.D., Garmash A.A., Dubinskiy A.V.
Using the gate capacitance of MOS transistor as LPF's capacitance and its impact on the PLL's characteristics of quality
 Boruzdina A.B., Temirbulatov M.S., Pechenkin A.A., Ulanova A.V., Yashanin I.B., Enns V.I., Yanenko A.V., Chumakov A.I.
Features of experimental research methods for memory with error correction
 Seletskiy A.V., Shelepin N.A., Smolin A.A., Ulanova A.V.
Investigation of the influence dispersion of technological parameters of VLSI on resistance to TID effects by device-technological simulation
 Chumakov A.I., Sogoyan A.V., Boruzdina A.B., Smolin A.A., Pechenkin A.A.
Mechanisms of Multiple Cell Upsets in Memory
 Moskovskaya Y., Sorokoumov G., Bobrovsky D.V., Nikiforov A.Y., Denisov A.N., Snicar V.G., Zhukov A.A., Ulanova A.V.
Rational composition of typical grading system for ASICís radiation hardness testing
 Gerasimov Yu.M., Grigoryev N.G., Kobylyatskiy A.V.
The technique of logical circuit parameters selection in nanometer RHBD CMOS VLSI
 Chumakov A.I., Bobrovsky D.V., Pechenkin A.A., Savchenkov D.V., Sorokoumov G.
Non-Stable Single Event Latch-up
 Sogoyan A.V., Chumakov A.I., Smolin A.A.
Single Event Rate Evaluation for Modern ICs

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