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Synopsys Armenia CJSC

Listing of all the works of the organization. Click on the work title to get the full information.

 Melikyan V.Sh., Shahinyan T.H., Martirosyan A.A.
Combined method of calculation of parasitic elements of substrate of integrated circuits
 Melikyan V.Sh.
Principles of Constructing a System of Logic Simulation with Consideration of Destabilizing Factors
 Melikyan V.Sh., Shaghgamyan D.A.
Method of calculation of integrated resistors of I/O cells of IC with code adjustment of the nominal value
 Melikyan V.Sh.
Method of rule checks of electromigration in VLSI
 Melikyan V.Sh., Shahinyan T.H.
Synthesis of substrate models of SoC
 Melikyan V.Sh., Mirzoyan D.L., Petrosyan G.A., Aharonyan V.K.
An Algorithm for determining the size of transistors, based on statistical static timing analysis
 Melikyan V.Sh., Abovyan S.G., Petrosyan G.P., Grigoryan D.Kh.
The method of computing theoretical bounds on the performance of DVFS controllers in MPSoC
 Melikyan V.Sh., Babayan E.H., Harutyunyan A.G., Melikyan N.V., Zargaryan G.E.
A method for reducing timing delay temperature dependence of digital integrated circuits
 Melikyan V.Sh., Galstyan V.A., Alexanyan A.L., Arutyunyan A.S.
Integrated Step Up/Down Power Converter With Dynamic Control Of Clock Frequency
 Melikyan V.Sh., Avetisyan Z., Hovsepyan A., Mkhitaryan A.Kh., Hayrapetyan A.K., Petrosyan A., Mkrtchyan A.E.
SDF Report Generation Methodology for Digital Delay Lineswithout Simulations
 Melikyan V.Sh., Petrosyan A., Mkhitaryan A.Kh., Hayrapetyan A.K., Avetisyan Z., Mkrtchyan A.E.
The Single Event Upset Forecasting in Digital and Analog Integrated Circuits in SAED 14nm FinFet Technology

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