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System of Compaction and Migration of Standard Cell Layouts

Authors
 Rozenfeld V.P.
 Sotnikov M.A.
 Topuzov I.G.
 Ulukhanov E.A.
 Shiro E.G.
Date of publication
 2005

Abstract
 Up-to-date process technologies have achieved feature size of less than the wave length used in photolithography. It resulted in significant complication of the lithographic process and consequently design rules that became much more complex than the ordinary spacing/width rules. New design rules depend on configuration, size and relative location of layout shapes. Technology constraints of such a kind make layout design of modern integrated circuits more labour-consuming than before.
Feature size reduction resulted in increasing of contribution of interconnections to delays even at the standard cell level. Accounting for circuit performance issues during layout development is one more factor of design complexity.
Along with the mentioned problems there is frequent changing of process technologies. Every year a new process is created with a smaller feature size that first of all demands development of new standard cell libraries. High dynamics of the modern semiconductor market demands creation of design libraries according to rigid development schedules and sometimes simultaneously with development of new process technologies.
Thus, complex design rules, requirements to account for influence of interconnections and reliability issues, and rigid development schedules make development of standard cell libraries impossible without CAD systems. Layout compaction and migration are important tasks of automatic layout design.
Keywords
 layout compaction, layout migration, standard cells
Library reference
 Rozenfeld V.P., Sotnikov M.A., Topuzov I.G., Ulukhanov E.A., Shiro E.G. System of Compaction and Migration of Standard Cell Layouts // Problems of Perspective Microelectronic Systems Development - 2005. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2005. P. 121-127.
URL of paper
 http://www.mes-conference.ru/data/year2005/18.doc

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