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Self-Timed Computing Device for High-Reliable Applications

Authors
 Stepchenkov Yu.A.
 Diachenko Yu.G.
 Rozhdestvenskij Yu.V.
 Morozov N.V.
 Stepchenkov D.Yu.
Date of publication
 2010

Abstract
 Design results of self-timed computing device performing division and square root extraction in
accordance with IEEE 754 Standard are presented. Advanced indicating subcircuit provides full total-lot control of transition termination of all elements in the computing device at each phase of work. Suggested hierarchical analysis
provides a validity of a self-timed feature of the computing device.
Keywords
 Self-timed circuits; self-check; computing device; hierarchical analysis
Library reference
 Stepchenkov Yu.A., Diachenko Yu.G., Rozhdestvenskij Yu.V., Morozov N.V., Stepchenkov D.Yu. Self-Timed Computing Device for High-Reliable Applications // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2010. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2010. P. 418-423.
URL of paper
 http://www.mes-conference.ru/data/year2010/papers/m10-174-73741.pdf

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