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Investigation of single event upset reliability for SOI CMOS SRAM cells using mixed-mode 3D TCAD-SPICE simulation

Authors
 Petrosyants K.O.
 Kharitonov I.A.
 Orekhov E.V.
 Sambursky L.M.
 Yatmanov A.P.
 Voevodin A.V.
Date of publication
 2012

Abstract
 The results of 3D TCAD-SPICE mixed-mode simulation of charged nuclear particle impact in different areas of n-MOSFET in SOI CMOS SRAM cell taking into account MOSFETs scaling from 0.5 um to 0.1 um are presented.
It is shown that SRAM SEU reliability substantially depends not only on critical charge alone but also on impact location and current pulse shape.
Keywords
 SRAM cells, SOI CMOS, SEU, TCAD-SPICE simulation , mixed-mode simulation, MOSFET scaling
Library reference
 Petrosyants K.O., Kharitonov I.A., Orekhov E.V., Sambursky L.M., Yatmanov A.P., Voevodin A.V. Investigation of single event upset reliability for SOI CMOS SRAM cells using mixed-mode 3D TCAD-SPICE simulation // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2012. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2012. P. 413-418.
URL of paper
 http://www.mes-conference.ru/data/year2012/pdf/D173.pdf

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