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Methods of the parasitic extraction of interconnect in the integral circuits

Authors
 Bezrukov A.E.
 Rusakov A.S.
 Tkachev D.F.
 Khapaev M.M.
Date of publication
 2005

Abstract
 In this paper we present an overview of the modern approaches to the calculation of the on chip interconnect parasitic elements. A new method for the 2D capacitance and inductance calculations are proposed.
Keywords
 parasitic extraction, interconnect, capacitance extraction, resistance extraction.
Library reference
 Bezrukov A.E., Rusakov A.S., Tkachev D.F., Khapaev M.M. Methods of the parasitic extraction of interconnect in the integral circuits // Problems of Perspective Microelectronic Systems Development - 2005. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2005. P. 45-50.
URL of paper
 http://www.mes-conference.ru/data/year2005/06.doc

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