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High-speed content addressable memory block design

Authors
 Potovin Y.M.
 Soin S.
Date of publication
 2014

Abstract
 Considered content addressable memory unit. Describes the circuitries, that improve performance. Block is implemented in accordance with the rules and regulations of company TSMC 28nm technology and can be used in future projects.
Keywords
 content addressable memory, static memory, low power, memory cell, high-speed, noise margin
Library reference
 Potovin Y.M., Soin S. High-speed content addressable memory block design // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2014. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2014. Part 4. P. 29-32.
URL of paper
 http://www.mes-conference.ru/data/year2014/pdf/D153.pdf

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