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The implementation of channels of DDR4 RAM for microprocessor "Elbrus-82"  

Authors
 Yurlin S.V.
Date of publication
 2016

Abstract
 In this article DDR4 interface integrating principles of are described for microprocessor's chip and package and also for board of it's modules. Approach of reference planes and retention island power organization are considered. The technical solutions of DDR4 implementation for "Elbrus-8C2" microprocessor are provided.
Keywords
 DDR4, reference plane, capacitor, retention island, microprocessor.
Library reference
 Yurlin S.V. The implementation of channels of DDR4 RAM for microprocessor "Elbrus-82" // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2016. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2016. Part 3. P. 157-164.
URL of paper
 http://www.mes-conference.ru/data/year2016/pdf/D057.pdf

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