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Configurable IP-cores architecture analysys using criterion of implementation ability in “MULTICORE” platform IP-library

Authors
 Kozlova N.N.
 Solokhina T.V.
 Gribov Yu.I.
 Belyaev A.A.
Date of publication
 2005

Abstract
 Distinctive features of different configurable computational architectures are discussed.
Estimation of these architectures is made from the viewpoint of their implementation ability as parts of “MULTICORE” platform IP-library.
Keywords
 digital signal processing, ñonfigurable computational units, ñonfigurable IP-cores
Library reference
 Kozlova N.N., Solokhina T.V., Gribov Yu.I., Belyaev A.A. Configurable IP-cores architecture analysys using criterion of implementation ability in “MULTICORE” platform IP-library // Problems of Perspective Microelectronic Systems Development - 2005. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2005. P. 523-529.
URL of paper
 http://www.mes-conference.ru/data/year2005/78.doc

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