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Integrated digital 6-bit attenuator for 8-12 GHz band  

Authors
 Andreev D.A.
 Koptsev D.A.
Date of publication
 2016

Abstract
 The article is devoted for the design of the integrated 6-bit attenuator performed on SOI CMOS 180 nm process technology based on, available at JSC "Mikron". The peculiarity of the proposed attenuator circuits is the lack of traditional switches signals. The keys are designed to change the status of the signal attenuator, integrated into the attenuated cell. This arrangement minimizes the loss of amplitude attenuation due to the smaller number of series-connected transistors. Designed for 8-12 GHz device has dimensions of 190 x 137 mm2 (without pads), insertion loss is not more than 3 dB.
Keywords
 SOI 180 nm, attenuator, SPDT, silicon-on-isolator.
Library reference
 Andreev D.A., Koptsev D.A. Integrated digital 6-bit attenuator for 8-12 GHz band // Problems of Perspective Micro- and Nanoelectronic Systems Development - 2016. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2016. Part 3. P. 45-48.
URL of paper
 http://www.mes-conference.ru/data/year2016/pdf/D176.pdf

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