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Combined method of calculation of parasitic elements of substrate of integrated circuits

Authors
 Melikyan V.Sh.
 Shahinyan T.H.
 Martirosyan A.A.
Date of publication
 2006

Abstract
 A new, combined method of calculating the parasitic elements of the substrates of integrated circuits is proposed. The comparison results of examples, calculated by means of the proposed method and the existing programs of the three-dimensional calculation is presented. It is shown that, while ensuring an acceptable accuracy of calculations, the proposed method has high performance.
Keywords
 Combined method, parasitic elements, integrated circuits
Library reference
 Melikyan V.Sh., Shahinyan T.H., Martirosyan A.A. Combined method of calculation of parasitic elements of substrate of integrated circuits // Problems of Perspective Microelectronic Systems Development - 2006. Proceedings / edited by A. Stempkovsky, Moscow, IPPM RAS, 2006. P. 72-75.
URL of paper
 http://www.mes-conference.ru/data/year2006/11.pdf

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